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[Com Port] rec

Description: uart串口通信程序 用VERILOG HDL　编写　可以有效应用于FPGA上-UART serial communication program with VERILOG HDL can be effectively used in the preparation of the FPGA
Platform: | Size: 1024 | Author: 德刚 | Hits:

[VHDL-FPGA-Verilog] usart_verilog

Description: 通用串行异步收发器8251的Verilog HDL源代码.doc-Universal Serial Asynchronous Receiver Transmitter 8251 the Verilog HDL source code. Doc
Platform: | Size: 15360 | Author: 赵国柱 | Hits:

[VHDL-FPGA-Verilog] spi_op_core

Description: 串行数据SPI master的开源控制器，verilog，内附说明-SPI master serial data open-source controller, verilog, containing a description
Platform: | Size: 81920 | Author: 王天 | Hits:

[Com Port] I2C_verilog

Description: I2C总线是Philips公司推出的双向两线串行通讯标准，具有接口线少、通讯效率高等特点。将I2C总线设计成FPGA内部的模块，可以方便FPGA与其他具有I2C总线的设备通信。-I2C bus is Philips has introduced two-way two-wire serial communication standard, with fewer line interface, communications and high efficiency. I2C bus will be designed within the FPGA module, can easily FPGA and other devices with I2C bus communication.
Platform: | Size: 8192 | Author: 沈天平 | Hits:

[VHDL-FPGA-Verilog] xapp355

Description: Serial ADC Interface write in VHDL based on xilinx cpld
Platform: | Size: 33792 | Author: jiang | Hits:

[MPI] UART_Download

Description: 此为FPGA上的一个串口通信程序，已经通过仿真测试，完全可行-This is the FPGA a serial communication program has been tested through simulation, entirely feasible
Platform: | Size: 9216 | Author: 王骏 | Hits:

[VHDL-FPGA-Verilog] FPGA_UART

Description: 异步通信串行口设计实例，很实用。比较经典。-Asynchronous serial port communications design example, it is practical. Comparison of the classic.
Platform: | Size: 493568 | Author: 王网 | Hits:

[VHDL-FPGA-Verilog] S7_UART

Description: 利用FPGA实现串口通信，很好的学习资料 尤其是对 verilog不熟的朋友-FPGA realization of the use of serial communications, a very good learning materials especially in the wake of a friend Verilog
Platform: | Size: 468992 | Author: 杜菲 | Hits:

[VHDL-FPGA-Verilog] 16550

Description: UART16550兼容的串行通讯控制器，Verilog语言描述，采用Altera Cyclone系列芯片实现FPGA综合，因为FIFO部分利用到内部资源实现。已经在某项目中成功应用，特此推出。-UART16550 compatible serial communication controller, Verilog language description, the use of Altera Cyclone series FPGA chip integrated, as part of the use of FIFO to the internal resources to achieve. Projects have been in a successful application, is hereby introduced.
Platform: | Size: 10240 | Author: David.Mr.Liu | Hits:

[VHDL-FPGA-Verilog] uart_0

Description: 异步串行通信Uart接口设计，Verilog HDL程序，嵌入式必备哦-Asynchronous serial communication UART Interface Design, Verilog HDL procedures essential embedded Oh
Platform: | Size: 5120 | Author: 白雪 | Hits:

[VHDL-FPGA-Verilog] UART

Description: 用FPGA实现了RS232异步串行通信，所用语言是VHDL，另外本人还有Verilog的欢迎交流学习，根据RS232 异步串行通信来的帧格式，在FPGA发送模块中采用的每一帧格式为：1位开始位+8位数据位+1位奇校验位+1位停止位，波特率为2400。由设置的波特率可以算出分频系数，具体算法为分频系数X=CLK/(BOUND*2)。-Using FPGA to achieve the RS232 asynchronous serial communication, the language used is VHDL, In addition, I also welcome the exchange of learning Verilog, according to RS232 asynchronous serial communication to the frame format, in the FPGA module used to send each frame format : the beginning of a bit+ 8-bit data bit+ 1 bit odd parity bit+ 1 bit stop bit, baud rate for 2400. By setting the baud rate can be calculated at the frequency coefficient, the specific algorithm for the sub-frequency coefficient X = CLK/(BOUND* 2).
Platform: | Size: 1024 | Author: saibei007 | Hits:

[VHDL-FPGA-Verilog] UART_send

Description: Verilog HDL 串口发送程序，在ACTEL Fusion FPGA上实验成功 ，和大家一起分享！^_^-Verilog HDL send serial procedures, ACTEL Fusion FPGA in the success of the experiment, and share with everyone! ^ _ ^
Platform: | Size: 1024 | Author: whq | Hits:

[VHDL-FPGA-Verilog] UART_rec

Description: verilog 串口接收程序，在ACTEL Fusion FPGA上实验成功 和大家一起分享！^_^-Verilog serial receive process, ACTEL Fusion FPGA in the experimental success and share with everyone! ^ _ ^
Platform: | Size: 1024 | Author: whq | Hits:

[Com Port] uart

Description: 采用CPLD实现串口通信（Verilog硬件描述语言）-Realize the use of CPLD serial communication (Verilog Hardware Description Language)
Platform: | Size: 5120 | Author: wuzhidong | Hits:

[VHDL-FPGA-Verilog] AD9229-FPGA-files

Description: adi串行AD AD9229的控制使用ISE平台 Verilog语言 -adi serial ADAD9229 control the use of ISE platform Verilog language
Platform: | Size: 184320 | Author: 徐凯 | Hits:

[VHDL-FPGA-Verilog] SerialtoParallelConverter

Description: 串行转并行SerialtoParallelConverter-Serial to Parallel SerialtoParallelConverter
Platform: | Size: 26624 | Author: 磊 | Hits:

[VHDL-FPGA-Verilog] rs232

Description: dp_xiliux 的 CPLD Verilog设计实验,串口演示.代码测试通过. -dp_xiliux the CPLD Verilog design experiments, serial presentation. code test.
Platform: | Size: 121856 | Author: pp | Hits:

[GPS develop] FPGAdatatransport

Description: 本文设计的FPGA模块需要对GPS、便携打印机和串口数据进行处理，将详细介绍如何设计FPGA和不同外设之间的数据传输。同时，在RTL编码中，编写使综合与布局布线效果更佳的代码。-In this paper, the design of FPGA modules need for GPS, portable printers, and serial data processing, will be details on how to design FPGA and data transfer between peripherals. At the same time, RTL coding, synthesis and preparation to make better placement and routing code.
Platform: | Size: 11264 | Author: zhanyi | Hits:

[VHDL-FPGA-Verilog] syv0

Description: 针对串行存储器M25P80应用的verilog程序-M25P80 serial memory for applications Verilog program
Platform: | Size: 356352 | Author: wanghao | Hits:

[Embeded-SCM Develop] KEY

Description: 2乘8按键扫描程序 4个IO口 74LS164串行数据端 时钟端 两个普通IO口-2 x 8 keypad scanner 4 IO I 74LS164 serial data clock terminal end of two common IO port
Platform: | Size: 1024 | Author: zengxiaoqiang | Hits:
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